1. Field of the Invention
The present invention pertains to the field of integrated circuit memory devices. More particularly, this invention relates to a mechanism for selectively locking flash cell blocks in a flash memory device.
2. Art Background
A flash memory device contains a flash cell array for nonvolatile random access data storage in a computer system. A typical flash memory device implements a write control circuit for programming and erasing selected areas of the flash cell array. The write control circuit programs and erases the flash cells by applying a predetermined sequence of program level voltages to the flash cells. A typical flash cell array is subdivided into a set of flash cell blocks. The write control circuit may program/erase an entire flash cell block in a single operation, or program/erase a portion of a flash cell block.
However, the programs and data stored in the flash cell array are vulnerable to inadvertent program/erase operations. Inadvertent program/erase operations may be caused by a software bug in the computer system. In addition, inadvertent program/erase operations may be caused by hardware errors in the computer system. An inadvertent program/erase operation can destroy critical programs and data stored in the flash cell array.
Prior flash devices protected portions of the flash cell array from inadvertent program/erase operations by allocating a small protected area of the flash cell array for critical program and data storage. The protected area of the flash cell array is typically used to protect programs and data for system boot operations.
Usually in such prior flash devices, the protected area of the flash cell array cannot be programmed or erased unless a preselected pin of the flash device is driven to a high voltage level. For example, in a typical 5 volt flash device, a program/erase operation to the protected area is enabled by driving the preselected pin to 12 volts.
Unfortunately, such prior flash devices usually provide write protection for only a small area of the flash array. Moreover, the external circuitry required to drive the preselected pin to the high voltage level increases the overall cost and power consumption of the memory system containing such prior flash device.